OSW26BZ05-NV021Pre-ReleaseSBIR

Co-packaging Digital Readout Integrated Circuits and Photonics for Advanced Infrared Imaging

Department of DefenseOSD

AI Overview

This RFP seeks monolithic integration of photonic and electronic circuits on a single chip to dramatically improve infrared imaging performance. The goal is to reduce power consumption and increase data transmission speeds for cryogenic detector systems while maintaining reliability in demanding environments.

This summary is AI-generated from the official solicitation.

Key Details

Agency
Department of Defense
Funding Amount
Release Date
August 5, 2026
Due Date
September 23, 2026

Official Description

State of the art infrared digital focal plane arrays (FPAs) can produce >20 Gbps when operated at standard video framerates and in large formats. Designing output drivers for this bitstream in a cryogenic environment is nontrivial. It requires careful balancing of the electrical, mechanical, and thermal constraints of the readout integrated circuit (ROIC). Industry surveys indicate that the current state of practice is limited to just under 3 Gbps per channel and 10 pJ/bit. In a large format FPA...

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Change History

Opportunity AddedAug 5, 2026 at 12:02 PM

Co-packaging Digital Readout Integrated Circuits and Photonics for Advanced Infrared Imaging

New opportunity: Co-packaging Digital Readout Integrated Circuits and Photonics for Advanced Infrared Imaging

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