Defect Metrology and Charge Trapping Dynamics in Transfer-Doped Diamond Transistors

The Q&A was updated with a previously pending answer to Q1, which asked which surface acceptor and dielectric stack will be used on the Government-furnished hydrogen-terminated diamond test structures.

• Baseline stack confirmed: ALD aluminum oxide (Al2O3) serves as both gate dielectric and surface acceptor layer, deposited directly on the hydrogen-terminated diamond. Proposers should plan around a 30 nm baseline thickness.
• Metrology must be adaptable, not single-case: The methodology should handle single-layer dielectrics from 12 to 100 nm, and multi-layer stacks (for example, an extra ALD dielectric atop the baseline Al2O3).
• Alternate variants deferred: Specifics on other thicknesses and multi-layer stacks will be given to the selected performer after baseline validation, not in the proposal.

Why it matters: Proposals can commit to a 30 nm Al2O3 baseline while designing metrology that covers the 12–100 nm range and stacked dielectrics. Transition metal oxide options named in the original question (such as V2O5 or MoO3) are not mentioned in the answer, so applicants should not assume those variants are in scope.

• The Q&A now lists a question asking which surface-acceptor and gate/passivation dielectric stacks will be used for the Government-furnished hydrogen-terminated diamond test structures, including approximate layer thicknesses and any variants.
• No answer is included, so applicants still lack those details for planning their technical approach and test-structure compatibility.

Status changed from status: Pre-Release to status: Open.

New opportunity: Defect Metrology and Charge Trapping Dynamics in Transfer-Doped Diamond Transistors